View STV5346DT_177758.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

STV5346 STV5346/H - STV5346/T
MONOCHIP TELETEXT DECODER WITH 8 INTEGRATED PAGES
. . . . . . . . .
COMPLETE TELETEXT DECODER INCLUDING AN 8 PAGE MEMORY ON A SINGLE CHIP UPWARD SOFTWARE COMPATIBLE WITH PREVIOUS SGS-THOMSON's MULTICHIP SOLUTIONS (SAA5231, SDA5243, STV5345) SINGLE +5V SUPPLY VOLTAGE SINGLE 13.875MHz CRYSTAL REDUCED SET OF EXTERNAL COMPONENTS, NO EXTERNAL ADJUSTMENT OPTIMIZED NUMBER OF DIGITAL SIGNALS REDUCING EMC RADIATION HIGH DENSITY CMOS TECHNOLOGY DIGITAL DATA SLICER AND DISPLAY CLOCK PHASE LOCK LOOP 28 PIN DIP & SO PACKAGE
DIP28 (Plastic Package) ORDER CODE : STV5346 West European STV5346/H East European STV5346/T Turkish & European
SO28 (Plastic Package) ORDER CODE : STV5346D West European STV5346D/H East European STV5346D/T Turkish & European
PIN CONNECTIONS
CVBS MA/SL VDDA POL 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 CBLK TEST VSSA VSSO XTI XTO VDDD VCR/TV RESERVED RESERVED RESERVED SDA
5346-01.EPS
DESCRIPTION The STV5346 decoder is a computer-controlled teletext device including an 8 page internal memory. Data slicing and capturing extracts the teletext information embedded in the composite video signal. Control is accomplished via a two wire serial I2C bus (R). Internal ROM provides a character set suitable to display text using up to seven national languages. Different ROM versions will support several national character sets. Hardware and software features allow selectable master/slave synchronization configurations. The STV5346 also supports facilities for reception and display of current level protocol data.
November 1995
STTV/LFB FFB VSSD R G B RGB REF BLAN COR ODD/EVEN
SCL Y
1/21
STV5346 - STV5346/H - STV5346/T
PIN DESCRIPTION
Pin N 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
o
Symbol CVBS MA/SL VDDA POL STTV/LFB FFB VSSD R G B RGBREF BLAN COR ODD/EVEN Y SCL SDA RESERVED RESERVED RESERVED VCR/TV VDDD XTO XTI VSSO VSSA TEST CBLK
Function Input Input Analog Supply Input Output / Input Input Ground Output Output Output Supply Output Output Output Output Input Input/ Output Test Input/ Output Test Input/ Output Test Input/ Output Input Digital Supply Crystal Output Crystal Input Ground Ground Test Input / Output
Description Composite Video Signal Input through Coupling Capacitor Master/Slave Selection Mode +5V STTV / LFB / FFB Polarity Selection Composite Sync Output, Line Flyback Input Field Flyback Input Digital Ground Video Red Signal Video Green Signal Video Blue Signal DC Voltage to Define RGB High Level Fast Blanking Output TTL Level Open Drain Contrast Reduction Output 25Hz Output Field Synchronized for Non-interlaced Display Open Drain Foreground Information Output Serial Clock Input Serial Data Input/Output To be Connected to VSSD through a resistor To be Connected to VSSD through a resistor To be Connected to VSSD through a resistor PLL Time Constant Selection +5V Oscillator Output 13.875MHz Oscillator Input 13.875MHz Oscillator Ground Analog Ground Grounded to VSSA To connect Black Level Storage Capacitor
BLOCK DIAGRAM
S TTV/LFB FFB 5 CVBS 1 6 MA/SL P OL 2 4
Da ta
VDDD VDDA 22 3
CBLK 28 VCR /TV 21 XTI 24 XTO 23 VSS O 25
CLAMP ING S YNCHRONIZING DATA EXTRACTION
Clock
DATA DECODING DATA P ROCES S ING
Address CTRL
OS CILLATOR F REQUENCY S YNTHETIZER TIME BAS E
Data
8 P AGES MEMORY
Address CTRL
Data
12 BLAN 13 COR 8 RED GREEN 9
S CL 16 S DA 17
I C BUS INTERFACE
2
DISP LAY INTERFACE
10 BLUE 15 Y 7 VS S D 26
27
11
14
VSS A TE S T
RGB REF O DD/EVEN
2/21
5346-02.EPS
STV5346
5346-01.TBL
STV5346 - STV5346/H - STV5346/T
ABSOLUTE MAXIMUM RATINGS
Symbol VDD VI VO VDD Toper Tstg Input Voltage (any input) Output Voltage (any output) Difference between VDDD, VDDA Operating Ambient Temperature Storage Temperature Parameter Positive Supply Voltage on VDDD and V DDA Value - 0.3, 6.0 - 0.3, VDD + 0.5 - 0.3, VDD + 0.5 0.25 0, + 70 - 40, + 150 Unit V V V V
o o
C C
ELECTRICAL CHARACTERISTICS (VDD = 5V, VSS = 0V, TA = 25oC)
Symbol SUPPLIES VDD IDDD IDDA INPUTS CBLK IBLKO IBLKI CVBS CVBSI CVBSC tSYNC VCLAMP ICLPH ICLPL VIL VIH IIL CI SCL, SDA VIL VIH IIL fSCL tR, tF CI RGB REF VI II Input Voltage Input Current - 0.3 VDD 50 V mA Input Voltage Low Level Input Voltage High Level Input Leakage Current (VI = 0 to VDD) Clock Frequency (SCL) Input Rise and Fall Time (10 to 90%) Input Capacitance - 0.3 3 - 10 + 1.5 VDD + 10 100 2 10 V V A kHz s pF
5346-03.TBL
Parameter
Min.
Typ.
Max.
Unit
Supply Voltage VDDD Pin Supply Current VDDA Pin Supply Current
4.75
5 30 5
5.25
V mA mA
Source Current (VCBLK = 2V, VCVBS = 0V) Sink Current (VCBLK = 2V, V CVBS = 1V)) Video Input Amplitude (peak to peak) Input Capacitance Delay from CVBS to TCS Output from STTV Pin Clamping Level at Synchro Pulse High Level Clamp Current (CVBS = VCLAMP + 1V) Low Level Clamp Current (CVBS = VCLAMP - 0.3V) Input Voltage Low Level Input Voltage High Level Input Leakage Current (VI = 0 to VDDD) Input Capacitance - 0.3 2 - 10
80 - 10 1 10 200 0 5 - 400 + 0.8 VDD + 10 10
A A V pF ns mV A A V V A pF
MA/SL, POL, LFB, FFB, VCR/TV
3/21
5346-02.TBL
STV5346 - STV5346/H - STV5346/T
ELECTRICAL CHARACTERISTICS - VDD = 5V, VSS = 0V, TA = 25oC (continued)
Symbol OUTPUTS RGB VOL VOH CL tR, tF BLAN VOL VOH CL tR, tF VOL VOH CL tR, tF VOL CL tF IOLL SDA VOL tF CL Output Low Voltage (IOL = 3mA) Fall Time (3.0 to 1.0V) Load Capacitance 0 0.5 200 400 V ns pF Output Low Voltage (IOL = 2mA) Output High Voltage (IOH = -0.2mA) Load Capacitance Rise and Fall Time (10 to 90%) Output Low Voltage(IOL = 2mA) Output High Voltage (IOH = -0.2mA) Load Capacitance Rise and Fall Time (10 to 90%) Output Low Voltage (IOL = 2mA) Load Capacitance Fall Time (RL = 1.2k, VDDD - 0.5V to 1.5V) Output Leakage Current -10 0 0 VDD - 0.8 0 VDD - 0.5 50 20 0.5 VDD 50 20 0.5 25 50 +10 0.4 V V pF ns V V pF ns V pF ns A Output Low Voltage (IOL = 2mA) Output High Voltage (IOH = -2mA, RGB REF = VDD/2) Load Capacitance Rise and Fall Time (10 to 90%) RGB REF - 0.5 0.4 RGB REF 50 20 V V pF ns Parameter Min. Typ. Max. Unit
ODD/EVEN, STTV
COR AND Y (with Pull up to VDDD)
CRYSTAL OSCILLATOR XTI, XTO fXTAL RBIAS CI TIMING SERIAL BUS (referred to VIH = 3V, V IL = 1.5V) tLOW tHIGH tSU, DAT tHD, DAT tSU, STO tBUF tHD, STA tSU, STA 4/21 Clock : q Low Period q High Period Data Set-up Time Data Hold Time Stop Set-up Time from Clock High Start Set-up Time following a Stop Start Hold Time Start Set-up Time following Clock Low to High Transition 4 4 250 170 4 4 4 4 s Crystal Frequency Internal Bias Resistance Input Capacitance 0.4 13.875 1 3 7 MHz M pF
ns ns s s s s
5346-04.TBL
STV5346 - STV5346/H - STV5346/T
Figure 1 : Display Output Timing
LSP (TCS) 0 4.66 R.G.B.Y (1) 0 16.67 (a) LINE RATE 56.67 all timings in s 40s 64
lines 42 to 291 inclusive (and 355 to 604 inclusive interlaced) R.G.B.Y (1) 0 41 (b) FIELD RATE 291 312 line numbers
5346-03.EPS
Figure 2 : Serial Bus Timing
SDA t BUF
t LOW
tF
SCL t HD,STA tR t HD,DAT t HIGH t SU,DAT
SDA t SU,STA
VIH = 3V , VIL = 1.5V
5/21
5346-04.EPS
t SU,STO
STV5346 - STV5346/H - STV5346/T
Figure 3 : Master Synchronization Mode - Hardware Configuration
1 Synchro Extractor Line PLL Line PLL
MA/SL 2 +5V 4 POL
VCS R1D2 = "0"
TCS R1 D2 = "1" Bit R1 D2 I2C Control
STTV Output signal on STTV Pin : VCS when R1 D2 = 0 TCS when R1D2 = 1 VCS when R1D2 = 0 TCS when R1D2 = 1
5346-05.EPS
POL grounded
POL to VDD
Figure 4 : Master Synchronization Mode - Delivered Composite Synchronization Signal
VCS, TCS (interlaced) 621 (308) VCS, TCS (interlaced) 309 310 311 312 313 314 (1) 315 (2) 316 (3) 317 (4) 318 (5) 319 (6) 622 (309) 623 (310) 624 (311) 625 (312) 1 2 3 4 5 6
TCS (non-interlaced) 308 309 310 311 312 1 2 3 4 5 6
5346-06.EPS
The number positions indicate the end of lines. Internal signals : - VCS composite synchro from CVBS signal, - TCS Teletext composite synchro.
Figure 5 : Slave Synchronization Mode
MA/SL 2 +5V +5V POL
4 6
LFB
5
SCS FFB
POL grounded, Inputs Signals : are LFB line flyback synchro on Pin 5 FFB field flyback synchro on Pin 6 or SCS synchro composite signal on Pins 5 and 6 Note : R1D0 and R1D1 must be set to 1.
POL to VDD, Inputs Signals : are LFB line flyback synchro on Pin 5 FFB field flyback synchro on Pin 6 or SCS synchro composite signal on Pins 5 and 6
5346-07.EPS
6/21
STV5346 - STV5346/H - STV5346/T
APPLICATION DIAGRAM
0.1F 0.1F
1 CVBS
+5V +5V SL
CBLK 28 TEST 27 VSSA 26 VSSO 25 C1* XTI 24
2 MA/SL
MA
3 VDDA
1F +5V
4 POL 5 STTV/LFB 6 FFB 7 VSSD 8R 9G 10 B 11 RGB REF
1k
S T V 5 3 4 6
13.875MHz XTO 23 VDDD 22 TV VCR/TV 21 VCR
C2* +5V
+5V 1F 10nF
20
47k**
3.9k +5V 0.1F
19
47k**
18
47k** SDA 17 SCL 16 Y 15
12 BLAN 13 COR 14 ODD/EVEN
* Value according to used crystal, C1 = C2 = 2 * CLOAD Example : C1 = C2 = 56pF, CLOAD = 30pF. ** Depending on application. Please refer to our video application lab.
Remark : all the power supply inputs must be switched on at the same time (connected to the same source).
7/21
5346-08.EPS
STV5346 - STV5346/H - STV5346/T
FUNCTIONAL DESCRIPTION I - Displayable Page Memory Map The organization of a page-memory is shown in Figure 6. The display area consists of 25 rows of 40 characters per row. The organizationis as follows : - Row zero contains the page header : * The first seven characters (0 - 6) are used for messages regarding the operational status. * The eighth character is an alphanumericcontrol character either "white" or "green" defining the "search" status of the page. When it is "white" the operational state is normal and the header appears white ; when it is "green" the operaFigure 6 : Page Memory Organization
Fixed characters Alphanumerics white for normal, green on search 7 1
tional state corresponds to the "search mode" and the header appears green. * The following twenty-four characters give the header of the requested page when the system is in search mode. * The last eight characters display the time of day. - Row number twenty-four is used by the microprocessor for the display of information, or used to display X/24 colored key data according to R0D7 bit. - Row twenty-five comprises ten bytes of control data concerning the received page (see Table 1) and fourteen free bytes which can be used by the microprocessor.
7 Status Characters
24 characters from page header rolling on page search
8 scrolling time characters
ROW
24
8
0 1 2 3 4 5 6 7 8 9 10 11
MAIN PAGE DISPLAY AREA
12 13 14 15 16 17 18 19 20 21 22 23
row free for status (R0D7 = 0) or packet X/24 (R0D7 = 1) 10 14
24 25
5346-09.EPS
10 bytes for received page information
14 bytes free for use by C
8/21
STV5346 - STV5346/H - STV5346/T
FUNCTIONAL DESCRIPTION (continued) II - Ghost Row Memory Map
Row Address of Stored Data 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 0 X 0 0 X 0 0 X 0 0 X 1 Not used Designation Code 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 0 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 0 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0 0 1 0 1 X / 24 X / 25 X / 28 8 / 30 * X/28 X / 27 Composition Page extension stored here if R0D7 = 0 Page extension Color definition * Broadcasting service data packet Character set designation
5346-05.TBL
Row (Packet) Number
Function
X / 26
Enhanced display facilities Page related data stored in chapter corresponding to level 1 data, i.e. For 0 goes in 4 "1 " "5 "2 " "6 "3 " "7
X / 28
Conditional access Editorial Linked pages
* Packet 8/30 storage : 8/30/0,1 : chapter 4, row23 8/30/2,3 : chapter 5, row23 8/30/4 to 15 : chapter 6, row23
Table 1 : Row 25 Received Page Control Data Format
D0 D1 D2 D3 D4 D5 D6 D7 COLUMN PU0 PU1 PU2 PU3 HAM 0 0 0 0 PT0 PT1 PT2 PT3 HAM 0 0 0 1 MU0 MU1 MU2 MU3 HAM 0 0 0 2 MT0 MT1 MT2 C4 HAM 0 0 0 3 HU0 HU1 HU2 HU3 HAM 0 0 0 4 HT0 HT1 C5 C6 HAM 0 0 0 5 C7 C8 C9 C10 HAM 0 0 0 6 C11 C12 C13 C14 HAM 0 0 0 7 MAG0 MAG1 MAG2 0 FOUND 0 0 0 8 0 0 0 0 0 PBLF 0 0 9
5346-06.TBL
Page number : - MAG = magazine, PU = page units, PT = page tens. Page sub-code : - MU = minutes units, MT = minutes tens, HU = hours units, HT = hours tens. PBLF = page being looked for, FOUND = low for page found, HAM = hamming error in byte, C4-14 = control bits. 9/21
STV5346 - STV5346/H - STV5346/T
FUNCTIONAL DESCRIPTION (continued) III - I2C Bus Register Map (see Table 2) Registers R0 to R10 are write only whilst R11A is a read/write and R11B is a read only register respect to the microprocessor. The automatic succession on a byte basis is indicated by the arrows in Table 2. In the normal operating mode TB should be set to logic level 0. After power-up the contents of the registers are as Table 2 : Register specification
D7 X24 POSITION (1) D6 D5 D4 DISABLE ROLLING HEADER GHOST ROW ENABLE ACQ. CCT A0 PRD4 (1) COR IN COR IN TOP/ BOTTOM (1) R4 C4 D4 (R/W) 0 D3 (1) D2 EVEN OFF TCS ON START COLUMN SC2 PRD2 A2 TEXT IN TEXT IN BOX ON 24 A2 R2 C2 D2 (R/W) 0 D1 (1) D0 SEL 11B (1) FREE RUNNING PLL 7 + P/ 8 BIT BANK SELECT A2 (1) (1) BKGND IN BKGND IN CURSOR ON/OFF (1) (1) (1) D6 (R/W) 0 ACQ. ON/OFF ACQ. CCT A1 (1) (1) COR OUT COR OUT CONCEAL/ REVEAL (1) (1) C5 D5 (R/W) 0
follows : all bits in registers R0 to R11A are cleared to zero with the exception of bits D0 and D1 in registers R5 and R6 which are set to logical one. After power-up all the memory bytes are preset to hexadecimal value 20H (space) with the exception of the byte corresponding to row 0 of column 7 of chapter 0 which is set to the value corresponding to "alpha white" hexadecimal value 07H.
DEW/ FULL FIELD TB
T1
T0

R0
Mode 0
R1
Mode 1
(1)
START START COLUMN COLUMN SC0 SC1 PRD1 A1 PON OUT PON OUT BOX ON 1-23 A1 R1 C1 D1 (R/W) 0 PRD0 A0 PON IN PON IN BOX ON 0 A0 R0 C0 D0 (R/W) VCS QUAL
R2 R3 R4 R5 R6 R7 R8 R9 R10 R11A R11B
Page request address Page request data Display chapter Display control (normal) Display control (newsflash / subtitle) Display mode Active chapter Active row Active column
5346-07.TBL
(1) (1) BKGND OUT BKGND OUT STATUS ROW BTM/TOP (1) (1) (1) D7 (R/W) 60Hz
PRD3 (1) TEXT OUT TEXT OUT SINGLE/ DOUBLE HEIGHT CLEAR MEM. R3 C3 D3 (R/W) 0
Active data Status
(1) Reserved register bits : must be set to 0
10/21
STV5346 - STV5346/H - STV5346/T
FUNCTIONAL DESCRIPTION (continued) III - I2C Bus Register Map (continued) III.1 - Register Functions
Register Function Bit(s) SEL 11B (D0) EVEN OFF (D2) R0 Address 00H R11 adressing and pin functions control DISABLE ROLLING HEADER FREE RUNNING PLL (D6) X/24 POSITION (D7) T1 (D1) 0 0 1 1 T0 (D0) 0 1 0 1 Description Selection of register 11B (D0 = 1) or 11A (D0 = 0) Control of ODD/EVEN pin : EVEN signal output (D2 = 0) or grounded (D2 = 1) D4 = 1, Disable rolling header D4 = 0, Normal operation D6 = 0, PLL locks on line frequency D6 = 1, to force free running mode D7 = 0, packet X/24 stored to chapter 4 to 7/row 20 D7 = 1, packet X/24 stored to chapter 0 to 3/row 24 Character display line control : 312/313 line MIX - mode with interlace 312/313 line TEXT - mode without interlace 312/312 line Terminal mode without interlace External synchronization. SCS mode (scan field synchro) Master Mode (MA/SL Pin 2 = 0) case POL Pin 4 = 0 D2 = 0, Pin 5 = VCS D2 = 1, Pin 5 = TCS Slave Mode (MA/SL Pin 2 = VDD) No effect Selection of field flyback mode or full channel mode (D3 = 1) for recovering of Teletext data. Selection of ghost row mode (D4 = 1) Control of acquisition operation (D5 = 0 enables acquisition)
TCS ON (D2) R1 Address 01H
Operating mode controls DEW / FULLFIELD (D3) GHOST ROW ENABLE (D4) ACQUISITION ON / OFF (D5)
7 bits + parity or 8 bits Selection of received data format either 7 bits with parity without parity (D6) (D6 = 0) or 8 bits without parity (D6 = 1). SC0, SC1, SC2 (D0, D1, D2) R2 Address 02H Addressing information for a page request TB (D3) A0, A1 (D4, D5) A2 (D6) R3 Address 03H R4 Address 04H Data relative to the requested page (see Table 3) Selection of one of eight pages to display PRD0 - PRD4 (D0 - D4) A0, A1, A2 (D0, D1, D2) PON (D0, D1) R5 Address 05H Display control for normal operation TEXT (D2, D3) COR (D4, D5) BKGND (D6, D7) IN / OUT R6 Address 06H Display control for news-flash subtitle generation See R5 Address the first column of the on chip page request RAM to be written. Test bit equal to "0" in the normal working mode. Address a group of four consecutive pages currently used for data acquisition. Address of one of the two groups of four pages for acquisition in normal mode. Written data in the page request RAM, starting with the columns addressed by SC0,SC1,SC2. These 3 bits correspond to the logical states of the 3 address lines (A10, A11, A12) during memory read cycles. Picture on (IN: D0, OUT: D1) Text on (IN: D2, OUT: D3) Contrast reduction on (IN: D4, OUT: D5) Background color on (IN: D6, OUT: D7) Enable inside/outside the box See R5
5346-08.TBL
11/21
STV5346 - STV5346/H - STV5346/T
FUNCTIONAL DESCRIPTION (continued) III - I2C Bus Register Map (continued) III.1 - Register Functions (continued)
Register Function Bit(s) BOX ON 0, 1-23,24 (D0, D1, D2) R7 Address 07H Description The "boxing" function is enabled on row 0,1-23 and 24 by D0, D1 and D2 set to one.
Display mode
TOP / BOTTOM X0 = Normal Single / Double Height 01 = double height Rows 0 to 11 (D4/D3) 11 = double height Rows 12 to 23 Conceal / Reveal (D5) Conceal Reveal Function Cursor ON/OFF (D6) STATUS ROW BTM / TOP (D7) Cursor position given by row/column value of R9/R10 The row 24 is displayed before the "Main text Area" (lines 0-23) or after (D7 = 0).
R8 to R11A Address 08H to 0BH* R11B Address 0BH*
Active chapter address (R8), active row address (R9), active column address (R10). 2 Data contained in R11A read (written) from (to) memory by microprocessor via I C. VCS QUAL (D0) Status 60Hz (D7) Good VCS quality signal detected (D0 = 1) or disturbance (D0 = 0) VCS received with 60Hz frequency (D7 = 1) or 50Hz (D7 = 0). Valid only when if good V CS (D0 = 1)
* Reading of R11A or R11B is de termined by register 0, bit D0. Nevertheless, write operation is always performed on R11A register.
Table 3 : Register R3
START COLUMN
PRD4 Do care magazine Do care page tens Do care page units Do care hours tens Do care hours units Do care minutes tens Do care minutes units
PRD3 HOLD PT3 PU3 X HU3 X MU3
PRD2 MAG2 PT2 PU2 X HU2 MT2 MU2
PRD1 MAG1 PT1 PU1 HT1 HU1 MT1 MU1
PRD0 MAG0 PT0 PU0 HT0 HU0 MT0 MU0
0 1 2 3 4 5 6
If "HOLD" is low the page is held. The addressing of successive bytes via the I2C is automatic.
IV - Character Sets The complete character set with 8-bit decoding is given in Tables 4, 5 and 6. Characters in columns 0 and 1 are normally displayed as blanks. Black dots represent the character shape whereas white dots represent the background. Each character can be identified by a pair of corresponding row and column integers : for example the character "3" may be indicated by 3/3. A rectangle may be represented as follows : The characters 8/6, 8/7, 9/5, 9/7 are used as special characters, always in conjunction with 8/5. The 13 national characters are placed in columns with bit 8 = 0.
12/21
5346-10.TBL
The abbreviations have the same significance as in Table 1 with the exception of the "DO CARE" entries. It is only when this bit is "1" that the corresponding digit is taken into consideration on page request. For example, a page defined as "normal" or one defined as "timed" may be selected.
5346-09.TBL
FUNCTIONAL DESCRIPTION (continued)
Table 4 : STV5346 Complete Character Set (with 8 bit codes) - West European Languages
* **
0 0 0 1 0 1 0 0 8 9
13
0 0 0 1
1
0 0 0 0 0 1
5
0 0 1 1 1 1 0 1
15
0 1 1 1 0 6
6a 0
1 1 1 1 0
0
1 1 0 1
1
0 0 1 0 1 7
7a
0 1 1 12 14 1 0 1
3 3a 2a
0 or 1 0 1 0 1 4 2
0 or 1 0 1
B I T S b4 b 3 b2 b1 1
graphics black
graphics red
b8 b7 b6 b5
0
column
r o w
0
0
0
0
0
0
alphanumerics black
0
0
0
1
1
alphanumerics red
0
0
1
0
2
alphanumerics green graphics green graphics yellow graphics blue
Case using C12 C13 C14 = 001 (German Set)
graphics magenta
graphics cyan graphics white
conceal displa y
0
0
1
1
3
alphanumerics yellow
0
1
0
0
4
alphanumerics blue
0
1
0
1
5
alphanumerics magenta
These co ntrol characters are reserved for compatibility with other data codes. These co ntrol characters are presumed before each row begins
separated graphics
0
1
1
0
6
alphanumerics cyan
0
1
1
1
7
** alphanumerics white
1
0
0
0
8
flash
**
1
0
0
1
9
steady
** continuous graphics
**
1
0 * ESC
1
0
10
end box
1
0
1
1
11
start box
**
1
1
0
0
12
normal height
** black background
1
1
0
1
13
double height hold graphics
** new background
*
1
1 **
1
0
14
SO
*
release graphics
1
1
1
1
15
SI
STV5346 - STV5346/H - STV5346/T
13/21
5346-10.EPS
* **
14/21
0 0 1 0 2 2a 3 3a 4 5 6 6a 7 7a 8 9 12 13 14 15 0 0 0 0 0 1 0 0 0 1 1 1 1 1 0 1 0 0 1 0 1 0 0 1 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 0 1 1 1 1 1 0 0 1 1 graphics black 0 or 1 0 1 0 or 1 0 1 graphics red graphics green graphics yellow graphics blue graphics magenta graphics cyan graphics white conceal display ** separated graphics * ESC hold graphics ** release graphics
0
0
0
B I T S
0
b 4 b 3 b2 b 1
b8 b7 b6 b5
0
column
r o w
2
0
0
0
0
0
alphanumerics black
0
0
0
1
1
alphanumerics red
0
0
1
0
2
alphanumerics green
STV5346 - STV5346/H - STV5346/T
FUNCTIONAL DESCRIPTION (continued)
Case using C12 C13 C14 = 001 (Rumanian Set)
0
0
1
1
3
alphanumerics yellow
0
1
0
0
4
alphanumerics blue
0
1
0
1
5
alphanumerics magenta
Table 5 : STV5346/H Complete Character Set (with 8 bit codes) - East European Languages
5346-11.EPS
These co ntrol characters are reserved for compatibility with other data codes. These co ntrol characters are presumed before each row begins
0
1
1
0
6
alphanumerics cyan
0
1
1
1
7
** alphanumerics white
1
0
0
0
8
flash
**
1
0
0
1
9
steady
continuous graphics
**
1
0
1
0
10
end box
1
0
1
1
11
start box
**
1
1
0
0
12
normal height
** black background
1
1
0
1
13
double height
** new background
*
1
1
1
0
14
SO
*
1
1
1
1
15
SI
FUNCTIONAL DESCRIPTION (continued)
Table 6 : STV5346/TComplete Character Set (with 8 bit codes) - Turkish European Languages
* **
0 0 0 1 0 0 8 9 12 13 14 15 6 6a 7 7a 1 0 0 1 1 1 0 0 0 1 0 1 0 1 0 0 4 5 1 0 2 2a 3 3a 0 0 0 1 0 1 0 1 1 1 1 1 1 1 1 0 0 0 0 1 0 1 1 1 1 1 0 0 1 1 graphics black graphics red graphics green graphics yellow graphics blue graphics magenta graphics cyan graphics white conceal display 0 or 1 0 1 0 or 1 0 1
0
0
0
B I T S
0
b4 b3 b 2 b 1
b8 b7 b6 b5
0
column
r o w
2
0
0
0
0
0
alphanumerics
black
0
0
0
1
1
alphanumerics
red
0
0
1
0
2
alphanumerics
green
Case using C12 C13 C14 = 001 (German Set)
**
graphics separated graphics
0
0
1
1
3
alphanumerics
yellow
0
1
0
0
4
alphanumerics
blue
0
1
0
1
5
alphanumerics
magenta
0
1
1
0
6
alphanumerics
These cont rolcha racters are reserved for compatibility with other da ta codes. These cont rolcha racters are presumed before each row begins
*
ESC black
cyan
0
1
1
1
7
alphanumerics
**
white
1
0
0
0
8
flash
**
1
0
0
1
9
steady
continuous
**
1
0
1
0
10
end box
1
0
1
1
11
start box **
**
1
1
0
0
12
normal height
new
background
1
1
0
1
13
double
**
height hold graphics release graphics
background
*
1
1
1
0
14
SO
*
**
1
1
1
1
15
SI
STV5346 - STV5346/H - STV5346/T
15/21
5346-12.EPS
STV5346 - STV5346/H - STV5346/T
FUNCTIONAL DESCRIPTION (continued) The basic set of the 96 characters is shown in Table 7. The location of the 13 national characters Table 7 : Basic Character Set.
2/0 3/0 4/0
National Charac ter
are shown in Table 7 whilst full national character sets are depicted in Tables 8, 9 and 10.
5/0
6/0
National Character
7/0
2/1
3/1
4/1
5/1
6/1
7/1
2/2
3/2
4/2
5/2
6/2
7/2
2/3
National Character
3/3
4/3
5/3
6/3
7/3
2/4
National Character
3/4
4/4
5/4
6/4
7/4
2/5
3/5
4/5
5/5
6/5
7/5
2/6
3/6
4/6
5/6
6/6
7/6
2/7
3/7
4/7
5/7
6/7
7/7
2/8
3/8
4/8
5/8
6/8
7/8
2/9
3/9
4/9
5/9
6/9
7/9
2/10
3/10
4/10
5/10
6/10
7/10
2/11
3/11
4/11
5/11
National Character
6/11
7/11
National Character
2/12
3/12
4/12
5/12
National Character
6/12
7/12
National Charac ter
2/13
3/13
4/13
5/13
National Character
6/13
7/13
National Charac ter
2/14
3/14
4/14
5/14
National Character
6/14
7/14
National Character
5346-13.EPS
2/15
3/15
4/15
5/15
National Character
6/15
7/15
16/21
STV5346 - STV5346/H - STV5346/T
FUNCTIONAL DESCRIPTION (continued) Table 8 : STV5346 Character Set - West European Languages
7/14 CHARACTER POSITION (COLUMN/ROW) C14 2/3 0 2/4 4/0 5/11 5/12 5/13 5/14 5/15 6/0 7/11 7/12 7/13
1
0
1
0
PHCB (1)
C13
0
0
1
1
0
C12
0
0
0
0
1
LANGUAGE
SWEDISH
ENGLISH
SPANISH
GERMAN
FRENCH
ITALIAN
1
0
1
Note 1 :
Where PHCB are the Page Head er Control bits. Other Combinations default to English. Only the above characters change with the PHCB. All others characters in the basic set are sho wn in Table 7.
17/21
5346-14.EPS
STV5346 - STV5346/H - STV5346/T
FUNCTIONAL DESCRIPTION (continued) Table 9 : STV5346/H Character Set East European Languages Table 10 : STV5346/T Character Set Turkish European Languages
7/14 CHARACTER POSITION (COLUMN/ROW) 0 1 0 1 0 1 C14 2/3 0 2/4 4/0 5/11 5/12 5/13 5/14 5/15 6/0 7/11 7/12 7/13
CHARACTER POSITION (COLUMN/ROW)
C14
2/3
2/4
4/0
5/11
5/12
5/13
5/14
5/15
6/0
7/11
7/12
7/13
7/14
1
0
1
0
PHCB (1)
PHCB (1)
C13
C13
0
0
1
0
0
0
1
1
0
1
C12
1
C12
0
0
0
1
1
1
0
0
1
0
1
CZECHOSLOVAK
SERBO-CROAT
LANGUAGE
RUMANIAM
SWEDISH
LANGUAGE
ENGLISH
5346-15.EPS
SPANISH
GERMAN
GERMAN
TURKISH
FRENCH
ITALIAN
POLISH
1
0
1
Note 1 :
Where PHCB are the Page Header Control bits. Other Combinations default to German. Only the above characters change with the PHCB. All others characters in the basic set are shown in Table 7.
Note 1 :
Where PHCB are the Page Header Control bits. Other Combinations default to Turkish. Only the above characters change with the PHCB. All others characters in the basic set are shown in Table 7.
18/21
5346-16.EPS
STV5346 - STV5346/H - STV5346/T
FUNCTIONAL DESCRIPTION (continued) Figure 7 : Character Format
Alphanumerics and Graphics 'space' characte r 2/0
Alphanumerics character 2/13
Alphanumerics or blast-through alphanumerics character 4/8
Alphanumerics character 7/15
Contiguous graphics character 7/6
Separated graphics character 7/6
Separated graphics character 7/15 Background Color
Contiguous graphics character 7/15 Display Color
5346-17.EPS
=
=
19/21
STV5346 - STV5346/H - STV5346/T
PACKAGE MECHANICAL DATA 28 PINS - PLASTIC DIP
Dimensions a1 b b1 b2 D E e e3 F I L
Min.
Millimeters Typ. 0.63 0.45 1.27
Max.
Min.
Inches Typ. 0.025 0.018 0.050
Max.
0.23
0.31 37.4 16.68 2.54 33.02 14.1 4.445 3.3
0.009
0.012 1.470 0.657 0.100 1.300 0.555 0.175 0.130
DIP28.TBL
15.2
0.598
20/21
PM-DIP28.EPS
STV5346 - STV5346/H - STV5346/T
PACKAGE MECHANICAL DATA 28 PINS - PLASTIC MICROPACKAGE (SO)
Dimensions A a1 b b1 C c1 D E e e3 F L S
Min. 0.1 0.35 0.23
Millimeters Typ.
Max. 2.65 0.3 0.49 0.32 45 (typ.)
o
Min. 0.004 0.014 0.009
Inches Typ.
Max. 0.104 0.012 0.019 0.013
0.5 17.7 10 1.27 16.51 7.4 0.4 7.6 1.27 8 (max.)
o
0.020 18.1 10.65 0.697 0.394 0.050 0.65
SO28.TBL
0.713 0.419
0.291 0.016
0.299 0.050
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No licence is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. (c) 1995 SGS-THOMSON Microelectronics - All Rights Reserved Purchase of I2C Components of SGS-THOMSON Microelectronics, conveys a license under the Philips I2C Patent. Rights to use these components in a I2C system, is granted provided that the system conforms to the I2C Standard Specifications as defined by Philips. SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.
21/21
PM-SO28.EPS

▲Up To Search▲

Price & Availability of STV5346DT

	To Download STV5346DT Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .